1. Field of the Invention
The present invention relates to integrated circuit packaging technology, and more particularly, to integrated circuit package interconnection technology.
2. Background Art
Integrated circuit (IC) chips or dies from semiconductor wafers are typically interfaced with other circuits using a package that can be attached to a printed circuit board (PCB). One such type of IC package is a ball grid array (BGA) package. BGA packages provide for smaller footprints than many other package solutions available today. A BGA package has an array of solder ball pads located on a bottom external surface of a package substrate. Solder balls are attached to the solder ball pads. The solder balls are reflowed to attach the package to the PCB.
Multiple integrated circuit packages may be stacked upon one another to provide additional functionality in a small footprint in a package-on-package (POP) manner. In one POP implementation, a die (or dice) of a first package is coupled through an encapsulating material of the first IC package to a second IC package using solder balls formed on a substrate of the first IC package that are subsequently encapsulated by the encapsulating material. None of the solder balls of the interconnect structure may be exposed through the encapsulating material at a side edge of the encapsulating material, or the material of the solder balls may flow out of the encapsulating material when the second IC package is being solder connected to the first IC package. Thus, the first IC package requires a peripheral edge region of encapsulating material to be present, which in turn causes an undesired increase in size of the first IC package.
Millions of integrated circuit packages are needed each year to be implemented in electronic devices. What are needed are improved packaging-on-packaging techniques that can help meet the high quantity production needs for integrated circuit packages, and can produce smaller footprint packages.